Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

add Rd, Rs

Rd = Rd + Rs;
{d, s} ∈ {0, 1, …, 15}

Rev1+

000

Rs

00000

Rd

3

4

5

4

2

add Rd, Rx, Ry << sa

Rd = Rx + (Ry<< sa2);
{d, x, y}∈ {0, 1, …, 15}
sa ∈ {0, 1, 2, 3}

Rev1+

111

Rx

00000

Ry

0000000000

Shift Amount

Rd

3

4

5

4

10

2

4

Description

Adds the two registers specified and stores the result in destination register. Format II allows shifting of the second operand.

Status Flags

Format I: OP1 = Rd, OP2 = Rs

Format II:OP1 = Rx, OP2 = Ry << sa2

Q:

Not affected

V:

V = (OP1[31] AND OP2[31] AND ~RES[31]) OR (~OP1[31] AND ~OP2[31] AND RES[31])

N:

N = RES[31]

Z:

Z = (RES[31:0] == 0)

C:

C = OP1[31] AND OP2[31] OR OP1[31] AND ~RES[31] OR OP2[31] AND ~RES[31]