Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

acr Rd 

Rd = Rd + C;
 
d ∈ {0, 1, …, 15}

Rev1+

010111000000

Rd

12

4

Description

Adds carry to the specified destination register.

Status Flags

Q:

Not affected

V:

V = RES[31] AND ~Rd[31]

N:

N = RES[31]

Z:

Z = (RES[31:0] == 0) AND Z

C:

C = ~RES[31] AND Rd[31]

Example: 

; Add a 32-bit variable (R0) to a 64-bit variable (R2:R1)
add
R1, R0
acr
R2