Opcode/ Instruction |
Op/ En |
64/32 bit Mode Support |
CPUID Feature Flag |
Description |
EVEX.LLIG.F3.MAP5.W0 51 /r VSQRTSH xmm1{k1}{z}, xmm2, xmm3/m16 {er} |
A |
V/V |
AVX512-FP16 |
Compute square root of the low FP16 value in xmm3/m16 and store the result in xmm1 subject to writemask k1. Bits 127:16 from xmm2 are copied to xmm1[127:16]. |
Op/En |
Tuple |
Operand 1 |
Operand 2 |
Operand 3 |
Operand 4 |
A |
Scalar |
ModRM:reg (w) |
VEX.vvvv (r) |
ModRM:r/m (r) |
N/A |
This instruction performs a scalar FP16 square-root computation on the source operand and stores the FP16 result in the destination operand. Bits 127:16 of the destination operand are copied from the corresponding bits of the first source operand. Bits MAXVL-1:128 of the destination operand are zeroed. The low FP16 element of the destination is updated according to the writemask.
IF k1[0] or *no writemask*: DEST.fp16[0] := SQRT(src2.fp16[0]) ELSE IF *zeroing*: DEST.fp16[0] := 0 //else DEST.fp16[0] remains unchanged DEST[127:16] := src1[127:16] DEST[MAXVL-1:128] := 0
VSQRTSH __m128h _mm_mask_sqrt_round_sh (__m128h src, __mmask8 k, __m128h a, __m128h b, const int rounding); VSQRTSH __m128h _mm_maskz_sqrt_round_sh (__mmask8 k, __m128h a, __m128h b, const int rounding); VSQRTSH __m128h _mm_sqrt_round_sh (__m128h a, __m128h b, const int rounding); VSQRTSH __m128h _mm_mask_sqrt_sh (__m128h src, __mmask8 k, __m128h a, __m128h b); VSQRTSH __m128h _mm_maskz_sqrt_sh (__mmask8 k, __m128h a, __m128h b); VSQRTSH __m128h _mm_sqrt_sh (__m128h a, __m128h b);
Invalid, Precision, Denormal
EVEX-encoded instructions, see Table 2-47, "Type E3 Class Exception Conditions."