Opcode/ Instruction |
Op/En |
64/32 bit Mode Support |
CPUID Feature Flag |
Description |
VEX.L1.0F.W0 46 /r KXNORW k1, k2, k3 |
RVR |
V/V |
AVX512F |
Bitwise XNOR 16-bit masks k2 and k3 and place result in k1. |
VEX.L1.66.0F.W0 46 /r KXNORB k1, k2, k3 |
RVR |
V/V |
AVX512DQ |
Bitwise XNOR 8-bit masks k2 and k3 and place result in k1. |
VEX.L1.0F.W1 46 /r KXNORQ k1, k2, k3 |
RVR |
V/V |
AVX512BW |
Bitwise XNOR 64-bit masks k2 and k3 and place result in k1. |
VEX.L1.66.0F.W1 46 /r KXNORD k1, k2, k3 |
RVR |
V/V |
AVX512BW |
Bitwise XNOR 32-bit masks k2 and k3 and place result in k1. |
Op/En |
Operand 1 |
Operand 2 |
Operand 3 |
RVR |
ModRM:reg (w) |
VEX.1vvv (r) |
ModRM:r/m (r, ModRM:[7:6] must be 11b) |
Performs a bitwise XNOR between the vector mask k2 and the vector mask k3, and writes the result into vector mask k1 (three-operand form).
DEST[15:0] := NOT (SRC1[15:0] BITWISE XOR SRC2[15:0]) DEST[MAX_KL-1:16] := 0
DEST[7:0] := NOT (SRC1[7:0] BITWISE XOR SRC2[7:0]) DEST[MAX_KL-1:8] := 0
DEST[63:0] := NOT (SRC1[63:0] BITWISE XOR SRC2[63:0]) DEST[MAX_KL-1:64] := 0
DEST[31:0] := NOT (SRC1[31:0] BITWISE XOR SRC2[31:0]) DEST[MAX_KL-1:32] := 0
KXNORW __mmask16 _mm512_kxnor(__mmask16 a, __mmask16 b);
None.
None.
See Table 2-63, "TYPE K20 Exception Definition (VEX-Encoded OpMask Instructions w/o Memory Arg)."