Operations:

Syntax:

Operation:

Operands:

Program Counter:

Opcode

Comment

Stack

TST Rd

Rd = Rd AND Rd

0 <= d <= 31

PC = PC + 1

001000dddddddddd

Description

Tests if a register is zero or negative. Performs a logical AND between a register and itself. The register will remain unchanged. (Equivalent to instruction AND Rd,Rd.)

Status Register (SREG) and Boolean Formula

I

–

T

–

H

–

S

⇔

N XOR V, for signed tests.

V

0

0

Cleared.

N

⇔

R7

Set if MSB of the result is set; cleared otherwise.

Z

⇔

~R7 AND ~R6 AND ~R5 AND ~R4 AND ~R3 AND ~R2 AND ~R1 AND ~R0

Set if the result is 0x00; cleared otherwise.

C

–

R (Result)

R (Result) equals Rd.

Example: 

      tst   r0     ; Test r0
      breq  zero   ; Branch if r0=0
      ...
zero:
      nop          ; Branch destination (do nothing)

Words

1 (2 bytes)

Table Cycles

Name

Cycles

AVRe

1

AVRxm

1

AVRxt

1

AVRrc

1