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Syntax: |
Operation: |
Operands: |
Program Counter: |
Opcode |
Comment |
Stack |
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SPM |
PS(RAMPZ:Z) = 0xffff |
None |
PC = PC + 1 |
1001010111101000 |
Erase program memory page |
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|
SPM |
PS(RAMPZ:Z) = R1:R0 |
None |
PC = PC + 1 |
1001010111101000 |
Write program memory word |
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|
SPM |
PS(RAMPZ:Z) = R1:R0 |
None |
PC = PC + 1 |
1001010111101000 |
Load page buffer |
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|
SPM |
PS(RAMPZ:Z) = BUFFER |
None |
PC = PC + 1 |
1001010111101000 |
Write page buffer to program memory |
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|
SPM |
BLBITS = R1:R0 |
None |
PC = PC + 1 |
1001010111101000 |
Set Boot Loader Lock bits |
SPM can be used to erase a page in the program memory, to write a page in the program memory (that is already erased), and to set Boot Loader Lock bits. In some devices, the Program memory can be written one word at a time. In other devices, an entire page can be programmed simultaneously after first filling a temporary page buffer. In all cases, the program memory must be erased one page at a time. When erasing the program memory, the RAMPZ and Z-register are used as page address. When writing the program memory, the RAMPZ and Z-register are used as page or word address, and the R1:R0 register pair is used as data(1). The Flash is word-accessed for code space write operations, so the least significant bit of the RAMPZ register concatenated with the Z register should
be set to ‘0'. When setting the Boot Loader Lock bits, the R1:R0 register pair is used as data. Refer to the device documentation for the detailed description of SPM usage. This instruction can address the entire program memory.
The SPM instruction is not available on all devices. Refer to Appendix A.
Note: 1. R1 determines the instruction high byte, and R0 determines the instruction low byte.
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I |
– |
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T |
– |
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H |
– |
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S |
– |
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V |
– |
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N |
– |
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Z |
– |
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C |
– |
; This example shows SPM write of one page for devices with page write
; - the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y-pointer
; the first data location in Flash is pointed to by the Z-pointer
; - error handling is not included
; - the routine must be placed inside the boot space
; (at least the do_spm sub routine)
; - registers used: r0, r1, temp1, temp2, looplo, loophi, spmcrval
; (temp1, temp2, looplo, loophi, spmcrval must be defined by the user)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
equ PAGESIZEB = PAGESIZE*2 ; PAGESIZEB is page size in BYTES, not words
org SMALLBOOTSTART
write_page:
; page erase
ldi spmcrval, (1<<PGERS) + (1<<SPMEN)
call do_spm
; transfer data from RAM to Flash page buffer
ldi looplo, low(PAGESIZEB) ; init loop variable
ldi loophi, high(PAGESIZEB) ; not required for PAGESIZEB<=256
wrloop:
ld r0, Y+
ld r1, Y+
ldi spmcrval, (1<<SPMEN)
call do_spm
adiw ZL, 2
sbiw looplo, 2 ; use subi for PAGESIZEB<=256
brne wrloop
; execute page write
subi ZL, low(PAGESIZEB) ; restore pointer
sbci ZH, high(PAGESIZEB) ; not required for PAGESIZEB<=256
ldi spmcrval, (1<<PGWRT) + (1<<SPMEN)
call do_spm
; read back and check, optional
ldi looplo, low(PAGESIZEB) ; init loop variable
ldi loophi, high(PAGESIZEB) ; not required for PAGESIZEB<=256
subi YL, low(PAGESIZEB) ; restore pointer
sbci YH, high(PAGESIZEB)
rdloop:
lpm r0, Z+
ld r1, Y+
cpse r0, r1
jmp error
sbiw looplo, 2 ; use subi for PAGESIZEB<=256
brne rdloop
ret ; return
do_spm:
in temp2, SREG ; input: spmcrval determines SPM action
cli ; disable interrupts if enabled, store status
wait:
in temp1, SPMCR ; check for previous SPM complete
sbrc temp1, SPMEN
rjmp wait
out SPMCR, spmcrval ; SPM timed sequence
spm
out SREG, temp2 ; restore SREG (to enable interrupts if
; originally enabled)
ret
1 (2 bytes)
|
Name |
Cycles |
|
AVRe |
-(1) |
|
AVRxm |
N/A |
|
AVRxt |
N/A |
|
AVRrc |
N/A |
Note:
1.
Varies with the programming time of the device.