Operations:

Syntax:

Operation:

Operands:

Program Counter:

Opcode

Comment

Stack

NEG Rd

Rd = 0x00 - Rd

0 <= d <= 31

PC = PC + 1

1001010ddddd0001

Description

Replaces the contents of register Rd with its two's complement; the value 0x80 is left unchanged.

Status Register (SREG) and Boolean Formula

I

–

T

–

H

⇔

R3 OR Rd3

Set if there was a borrow from bit 3; cleared otherwise.

S

⇔

N XOR V, for signed tests.

V

⇔

R7 AND ~R6 AND ~R5 AND ~R4 AND ~R3 AND ~R2 AND ~R1 AND ~R0

Set if there is a two's complement overflow from the implied subtraction from zero; cleared otherwise. A two's

complement overflow will occur only if the contents of the Register after the operation (Result) is 0x80.

N

⇔

R7

Set if MSB of the result is set; cleared otherwise.

Z

⇔

~R7 AND ~R6 AND ~R5 AND ~R4 AND ~R3 AND ~R2 AND ~R1 AND ~R0

Set if the result is 0x00; cleared otherwise.

C

⇔

R7 OR R6 OR R5 OR R4 OR R3 OR R2 OR R1 OR R0

Set if there is a borrow in the implied subtraction from zero; cleared otherwise. The C flag will be set in all cases

except when the contents of the Register after the operation is 0x00.

R (Result)

R (Result) equals Rd after the operation.

Example: 

      sub   r11,r0     ; Subtract r0 from r11
      brpl  positive   ; Branch if result positive
      neg   r11        ; Take two’s complement of r11
positive:
      nop              ; Branch destination (do nothing)

Words

1 (2 bytes)

Table Cycles

Name

Cycles

AVRe

1

AVRxm

1

AVRxt

1

AVRrc

1