Operations:

Syntax:

Operation:

Operands:

Program Counter:

Opcode

Comment

Stack

LSL Rd

C = Rd[7]

Rd = Rd << 1

0 <= d <= 31

PC = PC + 1

000011dddddddddd

C <-

b7 - - - - - - - - - - - - - - - - - - b0

<-

0

Description

Shifts all bits in Rd one place to the left. Bit 0 is cleared. Bit 7 is loaded into the C flag of the SREG. This operation effectively multiplies signed and unsigned values by two.

Status Register (SREG) and Boolean Formula

I

–

T

–

H

⇔

Rd3

S

⇔

N XOR V, for signed tests.

V

⇔

N XOR C, for N and C after the shift.

N

⇔

R7

Set if MSB of the result is set; cleared otherwise.

Z

⇔

~R7 AND ~R6 AND ~R5 AND ~R4 AND ~R3 AND ~R2 AND ~R1 AND ~R0

Set if the result is 0x00; cleared otherwise.

C

⇔

Rd7

Set if, before the shift, the MSB of Rd was set; cleared otherwise.

R (Result)

R (Result) equals Rd after the operation.

Example: 

      add   r0,r4  ; Add r4 to r0
      lsl   r0     ; Multiply r0 by 2

Words

1 (2 bytes)

Table Cycles

Name

Cycles

AVRe

1

AVRxm

1

AVRxt

1

AVRrc

1