Operations:

Syntax:

Operation:

Operands:

Program Counter:

Opcode

Comment

Stack

LDS Rd,k

Rd = DS(k)

0 <= d <= 31, 0 <= k <= 65535

PC = PC + 2

1001000ddddd0000kkkkkkkkkkkkkkkk

Description

Loads one byte from the data space to a register. The data space usually consists of the Register File, I/O memory, and SRAM, refer to the device data sheet for a detailed definition of the data space.

A 16-bit address must be supplied. Memory access is limited to the current data segment of 64 KB. The LDS instruction uses the RAMPD Register to access memory above 64 KB. To access another data segment in devices with more than 64 KB data space, the RAMPD in the register in the I/O area has to be changed.

This instruction is not available on all devices. Refer to Appendix A.

Status Register (SREG) and Boolean Formula

I

–

T

–

H

–

S

–

V

–

N

–

Z

–

C

–

Example: 

      lds   r2,0xFF00  ; Load r2 with the contents of data space location 0xFF00
      add   r2,r1      ; add r1 to r2
      sts   0xFF00,r2  ; Write back

Words

2 (4 bytes)

Table Cycles

Name

Cycles

AVRe

2(1)

AVRxm

3(1)(3)

AVRxt

3(2)

AVRrc

N/A

Notes:

1.

Cycle times for data memory access assume internal RAM access and are not valid for accessing external RAM.

2.

Cycle time for data memory access assumes internal RAM access, and are not valid for access to NVM. A minimum of one extra cycle must be added when accessing NVM. The additional time varies dependent on the NVM module implementation. See the NVMCTRL section in the specific devices data sheet for more information.

3.

If the LD instruction is accessing I/O Registers, one cycle can be deducted.