Syntax: |
Operation: |
Operands: |
Program Counter: |
Opcode |
Comment: |
Stack |
LD Rd, Z |
Rd = DS(Z) |
0 <= d <= 31 |
PC = PC + 1 |
1000000ddddd0000 |
Z: Unchanged |
|
LD Rd, Z+ |
Rd = DS(Z), Z = Z + 1 |
0 <= d <= 31 |
PC = PC + 1 |
1001000ddddd0001 |
Z: Post incremented |
|
LD Rd, -Z |
Z = Z - 1, Rd = DS(Z) |
0 <= d <= 31 |
PC = PC + 1 |
1001000ddddd0010 |
Z: Pre decremented |
|
LDD Rd, Z+q |
Rd = DS(Z+q) |
0 <= d <= 31, 0 <= q <= 63 |
PC = PC + 1 |
10q0qq0ddddd0qqq |
Z: Unchanged, q: Displacement |
Loads one byte indirect with or without displacement from the data space to a register. The data space usually consists of the Register File, I/O memory, and SRAM, refer to the device data sheet for a detailed definition of the data space.
The data location is pointed to by the Z (16-bit) Pointer Register in the Register File. Memory access is limited to the current data segment of 64 KB. To access another data segment in devices with more than 64 KB data space, the RAMPZ in the register in the I/O area has to be changed.
The Z-Pointer Register can either be left unchanged by the operation, or it can be post-incremented or pre- decremented. These features are especially suited for Stack Pointer usage of the Z-pointer Register. However, because the Z-Pointer Register can be used for indirect subroutine calls, indirect jumps, and table look-up, it is often more convenient to use the X- or Y-pointer as a dedicated Stack Pointer. Note that only the low byte of the Z-pointer is updated in devices with no more than 256 bytes of data space. For such devices, the high byte of the pointer is not used by this instruction and can be used for other purposes. The RAMPZ Register in the I/O area is updated in parts with more than 64 KB data space or more than 64 KB program memory, and the increment/decrement/displacement is added to the entire 24-bit address on such devices.
Not all variants of this instruction are available on all devices.
In the Reduced Core AVRrc, the LD instruction can be used to achieve the same operation as LPM since the program memory is mapped to the data memory space.
For using the Z-pointer for table look-up in program memory, see the LPM and ELPM instructions.
The result of these combinations is undefined:
LD r30, Z+
LD r31, Z+
LD r30, -Z
LD r31, -Z
Using the Z-pointer:
I |
– |
||
T |
– |
||
H |
– |
||
S |
– |
||
V |
– |
||
N |
– |
||
Z |
– |
||
C |
– |
clr r31 ; Clear Z high byte ldi r30,0x60 ; Set Z low byte to 0x60 ld r0,Z+ ; Load r0 with data space loc. 0x60(Z post inc) ld r1,Z ; Load r1 with data space loc. 0x61 ldi r30,0x63 ; Set Z low byte to 0x63 ld r2,Z ; Load r2 with data space loc. 0x63 ld r3,-Z ; Load r3 with data space loc. 0x62(Z pre dec) ldd r4,Z+2 ; Load r4 with data space loc. 0x64
1 (2 bytes)
Name |
Cycles i |
ii |
iii |
iv |
AVRe |
2(1) |
2(1) |
2(1) |
2(1) |
AVRxm |
2(1)(3) |
2(1)(3) |
3(1)(3) |
3(1)(3) |
AVRxt |
2(2) |
2(2) |
2(2) |
2(2) |
AVRrc |
1 / 2 |
2 / 3 |
2 / 3 |
N/A |
Notes:
1.
Cycle times for data memory access assume internal RAM access and are not valid for accessing external RAM.
2.
Cycle time for data memory access assumes internal RAM access, and are not valid for access to NVM. A minimum of one extra cycle must be added when accessing NVM. The additional time varies dependent on the NVM module implementation. See the NVMCTRL section in the specific devices data sheet for more information.
3.
If the LD instruction is accessing I/O Registers, one cycle can be deducted.