Operations:

Syntax:

Operation:

Operands:

Program Counter:

Opcode

Comment

Stack

CPC Rd,Rr

Rd - Rr - C

0 <= d <= 31, 0 <= r <= 31

PC = PC + 1

000001rdddddrrrr

Description

This instruction performs a compare between two registers Rd and Rr and also takes into account the previous carry. None of the registers are changed. All conditional branches can be used after this instruction.

Status Register (SREG) and Boolean Formula

I

–

T

–

H

⇔

~Rd3 AND Rr3 OR Rr3 AND R3 OR R3 AND ~Rd3

Set if there was a borrow from bit 3; cleared otherwise.

S

⇔

N XOR V, for signed tests.

V

⇔

Rd7 AND ~Rr7 AND ~R7 OR ~Rd7 AND Rr7 AND R7

Set if two's complement overflow resulted from the operation; cleared otherwise.

N

⇔

R7

Set if MSB of the result is set; cleared otherwise.

Z

⇔

~R7 AND ~R6 AND ~R5 AND ~R4 AND ~R3 AND ~R2 AND ~R1 AND ~R0 AND Z

The previous value remains unchanged when the result is zero; cleared otherwise.

C

⇔

~Rd7 AND Rr7 OR Rr7 AND R7 OR R7 AND ~Rd7

Set if the absolute value of the contents of Rr plus previous carry is larger than the absolute value of Rd; cleared otherwise.

R (Result)

R (Result) after the operation.

Example: 

                   ; Compare r3:r2 with r1:r0
      cp    r2,r0  ; Compare low byte
      cpc   r3,r1  ; Compare high byte
      brne  noteq  ; Branch if not equal
      ...
noteq: 
      nop          ; Branch destination (do nothing)

Words

1 (2 bytes)

Table Cycles

Name

Cycles

AVRe

1

AVRxm

1

AVRxt

1

AVRrc

1