Operations:

Syntax:

Operation:

Operands:

Program Counter:

Opcode

Comment

Stack

ADIW Rd,K

R[d+1]:Rd = R[d+1]:Rd + K

d ∈ {24,26,28,30}, 0 <= K <= 63

PC = PC + 1

10010110KKddKKKK

Description

Adds an immediate value (0-63) to a register pair and places the result in the register pair. This instruction operates on the upper four register pairs and is well suited for operations on the Pointer Registers.

This instruction is not available on all devices. Refer to Appendix A.

Status Register (SREG) and Boolean Formula

I

–

T

–

H

–

S

⇔

N XOR V, for signed tests.

V

⇔

~Rdh7 AND R15

Set if two's complement overflow resulted from the operation; cleared otherwise.

N

⇔

R15

Set if MSB of the result is set; cleared otherwise.

Z

⇔

~R15 AND ~R14 AND ~R13 AND ~R12 AND ~R11 AND ~R10 AND ~R9 AND ~R8 ANDR7 AND ~R6 AND ~R5 AND ~R4 AND ~R3 AND ~R2 AND ~R1 AND ~R0

Set if the result is 0x0000; cleared otherwise.

C

⇔

~R15 AND Rdh7

Set if there was a carry from the MSB of the result; cleared otherwise.

R (Result)

R (Result) equals R[d+1]:Rd after the operation.

Example: 

      adiw      r24,1      ; Add 1 to r25:r24
      adiw      ZL,63      ; Add 63 to the Z-pointer(r31:r30)

Words

1 (2 bytes)

Table Cycles

Name

Cycles

AVRe

2

AVRxm

2

AVRxt

2

AVRrc

N/A